1. Technical Field
The disclosure relates generally to nonvolatile memory devices and operation methods thereof, and particularly, to an operation method for a content addressable memory (CAM) block utilized as a read-only memory (ROM) in a nonvolatile memory device.
2. Related Art
For the function as a ROM, nonvolatile memory devices have been known to employ fuses to retain chip information and data relevant to operations therein. As the integration density of nonvolatile memory devices increases dramatically, such fuses have met scaling-down factor and/or manufacturing difficulty limits.
Because of those practical limitations, recent nonvolatile memory devices replace fuses with content addressable memory (CAM) cells, which are formed in a memory cell structure as a section of ROM. These CAM cells are disposed in a CAM block within a memory cell array of a nonvolatile memory device. For instance, a memory cell array 30 of a nonvolatile memory device may be organized to include 1st memory cell block to k'th memory cell block for storing normal data and a CAM block for storing chip information.
FIG. 1 shows a block configuration of a nonvolatile memory device.
The nonvolatile memory device of FIG. 1 includes a voltage supply circuit 10, a block switching circuit 20, a memory cell array 30 and a page buffer circuit 40.
The voltage supply circuit 10 transfers high voltages to global lines GDSL, GWL0˜GWLn and GSSL.
The block switching circuit 20 selects one from a plurality of the 1st to k'th memory cell blocks of the memory cell array 30 and transfers the high voltages from the voltage supply circuit 10 to a drain selection line DSL, word lines WL0˜WLn and source selection line SSL of the selected memory cell block.
The memory cell array 30 includes the 1st to k'th memory cell blocks storing normal data and a CAM block storing chip information. This chip information contains redundancy information and voltage levels used in programming, reading and erasing operations. One of the memory cell blocks belonging to the memory cell array 30 is designated as the CAM block.
The page buffer circuit 40 is coupled to the CAM block and the memory cell blocks by way of bit lines BL, and variably sets voltages of the bit lines in programming, reading and erasing operations.
When a power source voltage is applied to a chip (not shown) of the nonvolatile memory device (i.e., the nonvolatile memory device is powered up), the chip first begins reading the CAM block. Thus, the chip functions in accordance with the read chip information. A plurality of CAM cells included in the CAM block are distributed over different CAM pages (a CAM page means a unit of CAM cells coupled to the same word line). When a world line is selected to read the CAM cells coupled to the selected word line, it is required to apply a pass voltage of a high voltage level (e.g., 5V) to the remaining word lines coupled to the unselected CAM cells during the reading operation. For this reason, the nonvolatile memory device must be equipped with a pumping circuit for supplying such a high voltage, inevitably increasing current consumption due to the use of the high voltage. Moreover, a high voltage (e.g., the pass voltage) applied to gates of the unselected CAM cells during the reading operation may eventually deteriorate electric characteristics, causing the reliability of the nonvolatile memory device to be worsened over time.